The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of fabrication and verification processes for ICs, and, for improvements to be fully realized, further developments in IC manufacturing are needed.
As merely one example, advances in lithography have been important to reducing device size. In general, lithography is the transfer of a pattern onto a target such as a semiconductor substrate or mask. In photolithography, radiation such as ultraviolet light passes through or reflects off a mask before striking a photoresist coating on target. The mask transfers the pattern onto the photoresist, which is then selectively removed to reveal the pattern. The target then undergoes processing steps that take advantage of the shape of the remaining photoresist to create features on the target. Additionally or in the alternative, an electron beam (e-beam) may be used to expose the target either by exposing a photoresist or another material layer. As the name implies, electron-beam lithography directs a collimated stream of electrons to the area to be exposed. While precise, the narrow focus often makes e-beam lithography slower than photolithographic methods.
Despite remarkable advances in photolithography and e-beam lithography, increasing lithographic precision has increased the cost and complexity of the lithographic process. Therefore, while existing lithographic techniques have been generally adequate, they have not proved entirely satisfactory in all respects.